Design and Implementation of an Efficient Reversible Comparator Using TR Gate

A review on reversible logic gates and their implementation

Sustainability, Free Full-Text

Design and implementation of reversible logic gates using silicene-based p–n junction logic devices

Quantum Dot Cellular Automata-Based Design of 4 × 4 TKG Gate and Multiplier with Energy Dissipation Analysis

Optimized design and investigation of novel reversible toffoli and peres gates using QCA techniques - ScienceDirect

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Design of a reversible single precision floating point subtractor, SpringerPlus

Architecture diagram for reversible comparator using half subtraction

Quantum Dot Cellular Automata-Based Design of 4 × 4 TKG Gate and Multiplier with Energy Dissipation Analysis

PDF) Design and Implementation of an Efficient Reversible Comparator Using TR Gate

PDF] A new design of the reversible subtractor circuit

Design and Analysis of Combinational Circuits Using Reversible and Irreversible Gates

Reversible logic-based magnitude comparator (RMC) circuit using modified-GDI technique for motion detection applications in image processing - ScienceDirect

Quantum Dot Cellular Automata-Based Design of 4 × 4 TKG Gate and Multiplier with Energy Dissipation Analysis

A 0.5-V, 1.2-GS/s, 6-Bit Flash ADC Using Temporarily-Boosted Comparator